In 400V~800V high-voltage board-level electronics (such as EV on-board chargers and PV string inverters), stamping burrs are not merely cosmetic flaws—they are critical high-voltage safety hazards. Sharp metallic burr edges concentrate electric field lines, triggering localized corona discharge that pierces adjacent dielectric layers and causes catastrophic dielectric breakdown.
Four Shear Edge Zones & Burr Generation Mechanics
During punch shearing, metal strip forms four distinct zones: rollover, burnish zone, fracture zone, and burr. When punch tooling wears or die clearance exceeds 15% of material thickness $t$, the fracture angle steepens, pulling sharp 0.05mm~0.1mm micro-burrs onto the reverse face.
Creepage Degradation & IPC-A-610 Threshold Limits
A 0.05mm burr edge directly degrades electrical clearance while concentrating electric field stress. Under IPC-A-610 and IEC 60664-1, hardware burrs must be held strictly under 5% of material thickness $t$, with an absolute cap of ≤ 0.02mm (20μm).
- Consumer Electronics Standard: Burr allowance ≤ 0.03mm
- Automotive & High-Voltage Industrial (CUNECTRA Outbound Standard): Strict burr cap ≤ 0.015mm ~ 0.02mm
- Deburring Processes: Electrochemical polishing, magnetic abrasive finishing, and rotary tumbling
- 100% In-Die Optical Inspection: High-magnification vision cameras monitor sheared edge profile continuously
Impact of Zero Burrs on SMT Automated Pick-and-Place & Plating Quality
Eliminating burrs provides 100% vacuum seal integrity for pick-and-place nozzles, eliminating tape jams in high-speed feeders. Furthermore, smooth edges eliminate high-current-density plating nodules and peeling during reflow tin plating, significantly extending corrosion resistance.